We are looking for someone to provide Xilinx FPGA programming to support testing of small quantities (hundreds not thousands of units)of NAND flash, specifically the Samsung K9F2G08UXA NAND flash. The following is a high level description of the 2 required project: The FIRST project is a functional test controller. Below is the proposed functional test sequence: Functional Tests 1.) Read Manufacturer ID and Device Code 2.) Initial Block Test (Allow No Errors) a.) Program 00's b.) Read 00's c.) Block Clear d.) Read Block Blank 3.) Entire Array Test (Number of Bad Blocks Allowed To Be Determined) a.) Read Entire Array - Log Bad Block Locations b.) Block Clear c.) Program Checkerboard d.) Read Checkerboard - Log Any New Bad Blocks e.) Program Checkerboard Bar f.) Read Checkerboard Bar - Log Any New Bad Blocks g.) Block Clear h.) Read Entire Array Blank - Log Any New Bad Blocks i.) Program Bad Block Locations To Array Due to the time it would take to do all these steps on a single device, we're looking at testing in parallel. Either through a super controller that can drive multiple parts OR a simple/cheap controller that we'll just make multiples of. The SECOND project is a burn-in controller. We need to exercise the parts when they are in a burn in oven for (10days) by continously sending the Read cmd (00h 30h). We'll be burning in up to a couple of hundred units or so. So again we'll have to have multiple instances of the controller. When we have done similar projects in the past we have made use of existing FPGA evaluation boards which are relatively cheap and easily available. We're looking for you to help us with the hardware (architecture) design as well as the normal HDL code. Desired Skills: Computer Engineer, Electrical Engineering, Digital, Electronics Keywords: Other - Engineering & Manufacturing, Electronic, Engineer, Electrical, Computer, Digital